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I/O Devices Driver

I/O Devices
  • The I/O devices interact heavily with the OS. Generally consist of two parts:
             - Controller (Having its own processor)
             - The I/O Device itself

  • The physical control of the device is with its controller.
  • Controller accepts commands from OS and executes.
  • Controller has its own registers which are used to communicate with the driver.
  • Commands are complex and device dependent. 

Device Driver
  • Is a software, part of OS; that talks to the controller gives commands and accepts responses.
  • The controller manufacturer supplies the DD for each OS
  • Becomes the part of OS by
             Re-link, make an entry, or on-the-fly
  • It runs in kernel mode
  • I/O address space either the part of memory address space or separates I/O address spaces. If separate address space then requires separate instruction to read and write.
  • Three modes of communication
            1. Polling     2. Interrupts       3. DMA

I/O by Polling device
  • A user program invoke a system call
  • Transfer control from user space to kernel space.
  • The driver then starts the I/O and sits in a tight loop continuously polling the device to see if it is done (Some bit that indicates that the device is still busy)
  • CPU busy waiting, big use of CPU
  • When the I/O has completed, the driver puts the data where they are needed and sets the required bit indicating that the task is completed.
  • It is called programmed I/O, not really used any more as big wastage of CPU time.

I/O using Interrupt hardware aspect

1. The driver request the controller for I/O by writing into its device registers.
2. The controller then starts the device.
3. Controller after finishing reading or writing signals the interrupt controller chip using certain bus lines.
4. If controller accepts the interrupt then it puts the device on the bus so the CPU can read it form the device ready for services. 

The I/O using Interrupt processing Software aspect

1. Once the CPU calls the interrupt
2. The PC and PSW and other registers and data then pushed/saved into the stack.
3. CPU switched into kernel mode.And starts the handler.
4. When the handler completes I/O, CPU returns back to the previously running user program.

I/O by DMA
  • Special (controller) chip called Direct Memory Access (DMA)
  • Avoids using the CPU as part of the transfer to or from the memory
  • The CPU sets up the  DMA chip, telling it how many bytes to transfer, the device and memory addresses involved.
  • DMA Chip does the job and interrupts CPU when it is finished.
  • Spares the CPU to do some useful tasks.

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