Computer Peripherals

I/O Devices 

Basic I/O hardware

ports, buses, devices and controllers

I/O Software

Interrupt Handlers, Device Driver, Device-Independent Software, User-Space I/O Software

Important concepts

Three ways to perform I/O operations 

Polling, interrupt and DMAs 

Devices 

Storage devices (disk, tapes)

Transmission devices (network card, modem)

Human interface devices (screen, keyboard, mouse)

Specialized device (joystick)

Device Controller

 

I/O units typically consist of

A mechanical component: the device itself

An electronic component: the device controller or adapter.

Interface between controller and device is a very low level interface.

Example:

Disk controller converts the serial bit stream, coming off the drive into a block of bytes, and performs error correction.

 

I/O Controller

Disk controller

implements the disk side of the protocol that does: bad error mapping, prefetching, buffering, caching

Controller has registers for data and control

CPU and controllers communicate via

I/O instructions and registers 
Memory-mapped I/O

4 registers - status, control, data-in, data-out

Status - states whether the current command is completed, byte is available, device has an error, etc

Control - host determines to start a command or change the mode of a device

Data-in - host reads to get input

Data-out - host writes to send output

Size of registers - 1 to 4 bytes 

 

 

(a) Separate I/O and memory space

(b) Memory-mapped I/O

(c) Hybrid

 3 ways to Perform I/O

Polling

Interrupt

DMA

Polling

Polling - use CPU to

Busy wait and watch status bits

Feed data into a controller register 1 byte at a time

EXPENSIVE for large transfers

Not acceptable except small dedicated systems not running multiple processes

Interrupts

 

Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires

CPU hardware has the interrupt report line that the CPU senses after executing every instruction

device raises an interrupt

CPU catches the interrupt and saves the state (e.g., Instruction pointer)

CPU dispatches the interrupt handler

interrupt handler determines cause, services the device and clears the interrupt

Interrupt Handler

At boot time, OS probes the hardware buses to

determine what devices are present

install corresponding interrupt handlers into the interrupt vector

During I/O interrupt, controller signals that device is ready

Direct memory access (DMA) 

Assists in exchange of data between CPU and I/O controller

CPU can request data from I/O controller byte by byte – but this might be inefficient (e.g. for disk data transfer)

Uses a special purpose processor, called a DMA controller 

 

Use disk DMA as an example

CPU programs DMA controller, sets registers to specify source/destination addresses, byte count and control information (e.g., read/write)  and goes on with other work

DMA controller proceeds to operate the memory bus directly without help of main CPU – request from I/O controller to move data to memory

Disk controller transfers data to main memory

Disk controller acks transfer to DMA controller

    

 

                                

Operation of a DMA transfer

 

Handshaking between DMA controller and the device controller

Cycle stealing

DMA controller takes away CPU cycles when it uses CPU memory bus, hence blocks the CPU from accessing the memory

In general DMA controller improves the total system performance