# COMBINATIONAL CIRCUITS

Output does not depend on previous value of input and not feedback is required. It is consists of input variables , logic gates and output variables and No memory is required.

A logic circuit for the addition of two one-bit number is know as half adder and In simple language half adder is adds two binary digits and produces two binary outputs called sum and carry. In half adder the inputs are the augend lets say 'A' and addend 'B' bits

Total number of NAND / NOR gates required to implement half adder = 5 . Minimum number of logic gates needed to implement half adder circuit (if we have all gates except EX-OR and EX-NOR) is "3".To implement half adder , three 2:1 MUXs are required.

It performs the arithmetic sum of the three input bits i.e addend bit , augend bit and carry bit.Half adder is a simple circuit but not effective for adding more than two digits.When bits needs to be added , we use a full adder circuits.(the third bit is the previous carry bit)

A full Adder can be implement by two half adder and one OR gate or 1 full subtractor and 1 NOT gate.Total number of NAND gates / NOR gates required to implement a full adder is "9".

Logic expression;

Difference = D = Ä€B + AB-

Borrow = B = Ä€B

Total number of NAND / NOR gates required to implement the half subtractor is "5".

It is a circuit which performs a subtraction between two bits taking into account that a '1' may have been borrowed by a lower significant stage.

Logic expression;

**Half Adder:-**A logic circuit for the addition of two one-bit number is know as half adder and In simple language half adder is adds two binary digits and produces two binary outputs called sum and carry. In half adder the inputs are the augend lets say 'A' and addend 'B' bits

Total number of NAND / NOR gates required to implement half adder = 5 . Minimum number of logic gates needed to implement half adder circuit (if we have all gates except EX-OR and EX-NOR) is "3".To implement half adder , three 2:1 MUXs are required.

**Full Adder:-**It performs the arithmetic sum of the three input bits i.e addend bit , augend bit and carry bit.Half adder is a simple circuit but not effective for adding more than two digits.When bits needs to be added , we use a full adder circuits.(the third bit is the previous carry bit)

A full Adder can be implement by two half adder and one OR gate or 1 full subtractor and 1 NOT gate.Total number of NAND gates / NOR gates required to implement a full adder is "9".

**Full Adder for Carry****Full Adder for Sum****Half Subtractor**Logic expression;

Difference = D = Ä€B + AB-

Borrow = B = Ä€B

Total number of NAND / NOR gates required to implement the half subtractor is "5".

**Full Subtractor**It is a circuit which performs a subtraction between two bits taking into account that a '1' may have been borrowed by a lower significant stage.

Logic expression;

A full subtractor can be implemented with two half subtractor and one OR gate or 1 full adder and 1 NOT gate.Number of NAND/NOR gates required to implement the full subtractor is "9".

In parallel adder n-full adders or {(n-1) full adders and 1 half adder }or {(2n-1)half adders and (n-1) OR-gates} are required to add two n-bit numbers.

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