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Encoding of Machine Instructions in CAO

Assembly language program needs to be converted into machine instructions. (ADD = 0100 in ARM instruction set)
In the previous section, an assumption was made that all instructions are one word in length.
OP code: the type of operation to be performed and the type of operands used may be specified using an encoded binary pattern
  Suppose 32-bit word length, 8-bit OP code (how many instructions can we have?), 16 registers in total (how many bits?), 3-bit addressing mode indicator. 
Add  R1, R2 
Move  24(R0), R5 
LshiftR  #2, R0 
Move  #$3A, R1 
Branch>0  LOOP
What happens if we want to specify a memory operand using the Absolute addressing mode?
Move  R2, LOC
14-bit for LOC – insufficient
Solution – use two words
Then what if an instruction in which two operands can be specified using the Absolute addressing mode? 
Move  LOC1, LOC2 
Solution – use two additional words 
This approach results in instructions of variable length. Complex instructions can be implemented, closely resembling operations in high-level programming languages – Complex Instruction Set Computer (CISC)
If we insist that all instructions must fit into a single 32-bit word, it is not possible to provide a 32-bit address or a 32-bit immediate operand within the instruction. 
It is still possible to define a highly functional instruction set, which makes extensive use of the processor registers. 
Add  R1, R2 ----- yes 
Add  LOC, R2 ----- no 
Add  (R3), R2 ----- yes  

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